Enhancement MOSFET Voltage Divider Biasing to design Amplifier

Enhancement MOSFET are usually biased either using drain feedback bias or voltage divider bias. The depletion MOSFET can be biased using zero bias, fixed bias, self bias, voltage divider bias, two supply bias but the enhancement MOSFET cannot be biased using zero bias and self bias. Here it is shown how to design enhancement MOSFET based amplifier using voltage divider biasing method with example worked out calculations and online calculator.

VDB Biased E-MOSFET Amplifier Circuit & Operation

The following shows the circuit diagram of enhancement MOSFET biased using voltage divider biasing circuit.

voltage divider biased enhancement MOSFET amplifier circuit diagram

 Here the 2N7000 N-channel enhancement MOSFET is used as an example. The DC supply is 5V. The voltage divider circuit is made up of the resistors R1 and R2 which sets the gate bias voltage so that the Q-point or the biasing point is located in the active region(also called saturation region). When biased in the active region(saturation region) the circuit is used as an amplifier. The drain resistor RD and the source resistor RS are used to bias the output current and voltages. The capacitor C1 and C2 are the input and output coupling capacitor. The signal applied is 100mV with frequency of 1kHz which is coupled to the amplifier gate via the input coupling capacitor CC1. The output is coupled to the load resistor RL using the output coupling capacitor CC2. The CB is the bypass capacitor for resistor RS. 

Steps to design E-MOSFET amplifier using VDB method

1. Choose Q-point(the Bias Point)

 The first step to bias the amplifier is to select bias point or the operating point in the active region of operation. Following shows the selected bias point.

Q-point VDB E-MOSFET 2N7000

 The selected Q-point or the bias point is at,
\(V_{DSQ}\) = 2V,  \(I_{DQ}\) =3.3mA at \(V_{GS}\)=2.5V and \(V_{GS(th}=2.1V\)

2. Select Drain Voltage

Let us choose \(V_D=2.5V\) (should be greater than \(V_{DSQ}\) = 2V)

3. Calculate Source Voltage

\(V_{S} = V_D-V_{DS}\)

or, \(V_{S} = 2.5V-2V=0.5V\)  

4. Calculate gate voltage

The gate voltage can be calculated using,

 \(V_G=V_{GS}+ V_S\)

 or, \(V_G=2.5V+0.5V\)

that is,  \(V_G=3V\)

5. Calculate drain resistor

 The drain resistor is,

\(R_D = \frac{V_{DD}- V_D}{I_D}\)

or, \(R_D = \frac{5V-2.5V}{3.3mA }=\frac{2.5V}{3.3mA }\) 

that is, \(R_D=791.14 \Omega\)

6. Calculate the source resistor

The source voltage is given by,

\(V_S=I_S R_S\)

since \(I_S=I_D\), the source resistor is,

\(R_S = \frac{V_S}{I_D}\) 

or, \(R_S = \frac{0.5V}{3.3mA }\) 

that is, \(R_S =158.23\Omega\) 

7. Calculate voltage divider resistor

The gate voltage is given by the voltage divider rule as follows,


Rearranging we can write,


Let \(R_2=10k\Omega\)

then, \(R_1 = 10k\Omega (\frac{5V}{3V}-1)\)

that is, \(R_1 = 6.67k\Omega\)

8. Calculate \(R_d\)

\(R_d = R_D || R_L = \frac{R_D R_L}{R_D+R_L}\) 

Let, \(R_L=1k\Omega\) 

or, \(R_d = \frac{791.14 \Omega \times 1k\Omega}{791.14 \Omega+1k\Omega}\) 

thata is, \(R_d=441.70\Omega\)

9. Calculate device k,

\(k = \frac{I_D}{(V_{GS} - V_{GS(th)})^2}\)

or, \(k = \frac{3.3mA}{(2.5V - 2.1V)^2}=19.75 mA/V^2\)

10. Calculate transconductance gm,

\(g_m = 2k(V_{GS} - V_{GS(th)})\)  

or, \(g_m = 2\times 19.75 mA/V^2(2.5V - 2.1V)=15.80mS\) 

11. Calculate voltage gain Av,

\(A_v = g_m R_d\)  

or,\(A_v = 5.8mS times 441.70\Omega \)  

that is, \(A_v = 6.98\)  

12. Calculate input impedance Zi

\(Z_i = R_1 || R_2= \frac{R_1 R_2}{R_1+R_2}\) 

or, \(Z_i = \frac{6.67k\Omega1 \times 10k\Omega}{6.67k\Omega+10k\Omega}\) 

that is, \(Z_i = 4k\Omega\)

13. Calculate output impedance Zo

\(Z_o = R_d \) 

that is, \(Z_o = 441.70\Omega\)

14. Calculate input coupling capacitor

 The input coupling capacitor is,

\(CC_1 = \frac{1}{2 \pi f (0.1) Z_i}\)

or,\(CC_1 = \frac{1}{2 \pi (1kHz) (0.1) (4k\Omega)}\)

that is, \(CC_1 =398.09nF\)

15. Calculate input coupling capacitor

The output coupling capacitor is,

 \(CC_2 = \frac{1}{2 \pi f (0.1) Z_o}\)

or, \(CC_2 = \frac{1}{2 \pi (1kHz) (0.1) (441.7\Omega)}\)

that is, \(CC_2 = 3.61 \mu F\)

16. Calculate bypass capacitor

The bypass capacitor is,

 \(C_B = \frac{1}{2 \pi f (0.1) R_S}\)

or, \(C_B = \frac{1}{2 \pi (1kHz) (0.1) (158.23\Omega)}\)

that is, \(C_B = 158.23\mu F\)


The complete voltage divider biased enhancement MOSFET amplifier with the calculated component value is shown below.

voltage divider biased enhancement MOSFET amplifier calculated values
Following shows the circuit voltage and current obtained using the calculated values in circuit simulator.

VDB enhancement MOSFET amplifier circuit simulation
The following shows VDB enhancement MOSFET amplifier input and output signals on oscilloscope.
VDB enhancement MOSFET amplifier signals on oscilloscope

As can be seen from the oscilloscope graph, the input and output signals are out of phase with that the output signal is amplified.

Using Enhancement MOSFET Biasing And Amplifier Design Calculator

The E-MOSFET amplifier can be readily designed, that is the component values calculated using the online Enhancement MOSFET Biasing And Amplifier Design Calculator. Below shows screenshot of the component values obtained from the calculator.

voltage divider biased enhancement MOSFET amplifier calculator


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