# JFET Voltage divider Biased Amplifier Calculator

Below is online calculator for JFET amplifier design biased with voltage divider biasing method. This calculator calculates the resistor values, coupling and by pass capacitor values, tranconductance and voltage gain from the provided circuit specification. That is you have to enter the power supply source voltage, the JFET pinch off voltage, the drain saturation current, the desired location of the operation point(Q-point), the source voltage and the value of the resistor value for the voltage divider circuit.

 Inputs: VDD: V VP(-VGS(off)): V IDSS: mA VDSQ: V IDQ: mA VS: V R1: Î© KÎ©   fin: Hz KHz MHz Theoretical Results: VGS: VG: R2: RS: VD: RD: Zi: C1: Zo: C2: CS: gm: Av:

The above online calculator can help you in quickly perform calculation for the component values for JFET amplifier design. The following are the formula used by the above calculator.

Formula Equations:

1. $$V_{GS}= V_{GS(off)}(1- \sqrt{\frac{I_{DQ}}{I_{DSS}}})$$

Since the gate to source voltage at cutoff or the pinch off voltage(V=-Vgs(off)), drain to source gate shorted current value(Idss) and the desired drain current(Idq) is provided we calculate the gate to source voltage.

2. $$V_G = V_S+V_{GS}$$

Using the above calculate gate to source voltage and from the specification provided for source voltage (Vs) we can then calculate the gate voltage(Vg).

3. $$R_2 = \frac{V_G}{V_{DD}-V_G}R_1$$

By choosing value of R1 as specified, we can calculate the resistor R2 value for the required gate voltage above.

4. $$R_S = \frac{V_S}{I_S} = \frac{V_S}{I_D}$$

From the required drain current Id as specified and with chosen source voltage Vs we can calculate the source resistor value Rs.

5. $$V_D = V_{DS}+V_S$$

From given drain to source voltage(Vds) and from the source voltage we can calculate the drain voltage(Vd).

6. $$R_D = \frac{V_{DD}- V_D}{I_D}$$

From the calculated drain voltage(Vd) and using the drain current(Id) we can calculate the drain resistor value.

7. $$Z_i \simeq \frac{R_1 R_2}{R_1+R_2}$$

This is the approximate input stage input impedance for the voltage divider biased amplifier. This is approximated by the fact that the input impedance of the JFET itself is very large otherwise it would be in parallel with the equivalent parallel resistance of the voltage divider resistors.

8. $$C_1=\frac{1}{2 \pi (f) (0.1) (Z_i)}$$

Once we know the input impedance then we can calculate the coupling capacitor C1 value using the above formula.The frequency f is the input signal frequency. This formula is based on the fact that the reactance of C1 is lower than the input impedance by 10%.

9. $$Z_i \simeq R_D$$

The output impedance for the voltage divider biased amplifier is approximately as in above formula.We have neglected the ac drain resistance(rd) which is usually higher than the DC drain resistance(Rd) used in the above formula.

10. $$C_2=\frac{1}{2 \pi (f) (0.1) (Z_o)}$$

Knowing the output impedance then we can calculate the output coupling capacitor C2 using the above formula.

11. $$C_S=\frac{1}{2 \pi (f) (0.1) (R_S)}$$

This capacitor Cs is the bypass capacitor.

12. $$g_m = \frac{2 I_{DSS}}{|V_P|} (1-\frac{V_{GS}}{V_P})$$

This is standard transconductance formula.

13. $$A_v \simeq -g_m R_D$$

This is approximate standard voltage gain formula for JFET and depletion MOSFET voltage divider biased circuit.

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